Ka-Band Three-Stack CMOS Power Amplifier with Split Layout of External Gate Capacitor for 5G Applications
نویسندگان
چکیده
In this study, we designed a Ka-band two-stage differential power amplifier (PA) using 65 nm RFCMOS process. To enhance the output of PA, three-stack structure was utilized in stage, while driver stage PA with common-source to minimize consumption stage. The layout an external gate capacitor for stacked split maximize performance transistor. With proposed capacitor, gain, power, and power-added efficiency (PAE) were improved. Additionally, capacitive neutralization technique applied stages ensure stability gain PA. measured P1dB saturation 22.0 dBm 23.3 dBm, respectively, peak PAE 27.8% at 28.5 GHz.
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ژورنال
عنوان ژورنال: Electronics
سال: 2023
ISSN: ['2079-9292']
DOI: https://doi.org/10.3390/electronics12020432